@User @User This seems to be a more fundamental problem with how substrates are extracted. It adds them as a pin if they aren't connected, I think. I have a similar problem with a simple buffer (pbuf.mag) where there are shared well taps. It doesn't match (pbuf.spice vs pbuf.sp):

Subcircuit summary:
Circuit 1: pbuf                            |Circuit 2: pbuf
-------------------------------------------|-------------------------------------------
pinv (1)                                   |pinv (1)
pfet (1)                                   |p (1)
nfet (1)                                   |n (1)
Number of devices: 3                       |Number of devices: 3
Number of nets: 6 **Mismatch**             |Number of nets: 5 **Mismatch**
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: pbuf                            |Circuit 2: pbuf

---------------------------------------------------------------------------------------
Net: gnd                                   |Net: gnd
  pinv/gnd = 1                             |  pinv/gnd = 1
  nfet/(drain|source) = 1                  |  n/(drain|source) = 1
                                           |  n/bulk = 1
                                           |
Net: /pinv_0_0/w_n24_n6#                   |(no matching net)
  nfet/bulk = 1                            |
---------------------------------------------------------------------------------------
Netlists do not match.
Netlists do not match.

@User: I take full responsibility for this mess. I started coding a new method for dealing with the substrate in a new branch. When it appeared that the method actually worked, I merged it into the main branch. That turned out to be premature, as the method had several rather fundamental issues that didn't show up in the set of examples I was using. Meanwhile, the handling of hierarchical connections is mixed up with substrate extraction, so fixes to the handling of hierarchy made it virtually impossible to back out the new substrate handling method. I can say two things: (1) The most recent version of magic (possibly meaning today's version that I have not yet pushed) works correctly on your example. (2) The "new method" for dealing with substrate might have issues with old techfiles such as SCN4M_SUBM.20, which don't declare a "substrate" line in the tech file extract section. I think your layout (and by extension, all of your layouts) will work correctly because you are always drawing "pwell" under all nFET devices. Note that I am still tracking down an issue today related to labels attached to substrate, but once I've resolved that I'll push everything.

Thanks @User!

I pushed my fix and confirmed before I did that it still works on your example above.

Hm. I'm seeing it still extract the substrate connection

You're using version 8.3.272?

yeah

I can't guarantee that I'm using the same SCN4M_SUBM.20.tech27 file.

Can you attach yours?

Also, the entire set of commands above can be reduced to

ext2spice lvs ; ext2spice

, but that's unrelated.

oh, yeah, it works with your techfile

Ah, that's the qflow version. No, it's not a problem (or is not supposed to be) but I definitely should be using that one to check. So let me run the example again.