Yes many things are possible. I think simple via is easiest right now. For my target design, I would like a reusable filter block, with ringbuffer (SRAM), coefficient LUT (ROM), and multiply-accumulate block. I can design the core so that a special ROM address contains configuration information about the filter, such as the number of coefficients etc. In this way, the block can be synthesized and verified once, (and taped out, but that will probably never happen), and reused with different programming, to build up a DSP pipeline (for interpolation / decimation).