Solution we did was a metal fix that disconnected ...
# sky130
f
Solution we did was a metal fix that disconnected some of the on-chip decouling capacitances.
c
We simulated the bondwires in FastHenry/FastCap and then tried to model the resonances with the decoupling caps - probably not very accurately. Usually what I ended up doing was to put low-value resistors in series with some fraction of the capacitors, until the on-chip supply impedance vs frequency plot looked ok. I'd say more capacitance is almost always good, but sometimes needs to have well-chosen resistors added in series with some of it.
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f
I have to admit I am no expert in these things, my job was standard cell and SRAM design. But does adding resistances not defeat the purpose of the on-chip decoupling caps? As far as I understood the on-chip decoupling capacitances need to be very fast local charge storage to allow high peak currents before the current can come from off-chip decoupling caps. I would think adding resistances makes the charge storage slower.
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s
since you already have series 'impedance' (the bonding inductances) i think it's a tradeoff, since there is a resonating frequency you wanto to move it away without reducing decaps (which) as you said are needed.May be another effect is 'where' the decaps are located, close or far away from the power supply pads, close or far away from the high current consumption spots in the chip. However yes, i'm not an expert either.
c
@FatsieFS Yes adding resistance in series with the caps is a bit counterintuitive, but I would only add the small resistors in series with some of the caps, not all of them. Sometimes more than one resistor value in series with different capacitors is helpful. By de-Q-ing the resonance, the worst peaks of the impedance (vs. frequncy) can be made lower, at the expense of mildly increasing the impedance at some other frequencies. A lot of things are said about decoupling, but it is hard to formulate a concise general rule of thumb that is always correct. I'd say: make the best spice model you can, then do an ac analysis injecting a current and see how it responds over the range of frequencies that will be present, and fiddle with the circuit until the impedance vs frequency looks ok bearing in mind that the resonant frequencies may not be predicted very accurately. Then inject some current steps and make sure it looks ok in the time domain.