@User: The management SoC that is on the Caravel chip is, essentially, the same thing as a Raven chip without the analog parts, which is to say a more or less stock PicoRV32 RISC-V core. The analog components are there only to make the chip a more compelling SoC system more on par with commercially available low-performance microcontrollers with similar options along the lines of ADCs, DACs, and comparators. The analog multiplexers are nothing more than simple switches with two switches in series and the ability to ground the point between them to isolate the input from the output. So they would be simple to re-create. As for the area, the area would be similar to the management SoC area on Caravel, although I have never taken any great effort to optimize the PicoRV32 options, so it could be a lot smaller than it is. Like any microprocessor, the SRAM it needs will be at least the same size as the processor, and ideally much larger. Among the projects submitted for the first shuttle run, there are a number of processor cores, most of them much more complex than the PicoRV32. I still prefer the PicoRV32 because it's simple, straightforward, and it doesn't take me a lot of effort to understand what it's doing.

Thanks for your response, Tim. You've clarified all my doubts