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#sky130
Title
# sky130
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Matt Venn

06/15/2021, 5:50 PM
can you confirm you have no shorts left from triton route?
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Matthew Ballance

06/15/2021, 5:52 PM
I don't see any errors reported by routing. Anything I should look for specifically?
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Matt Venn

06/15/2021, 6:01 PM
check the summary.csv and make sure you have no shorts reported
the flow can finish and report lvs, but it's actually faling due to shorts
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Matthew Ballance

06/15/2021, 6:02 PM
In this case, no shorts reported (and thanks for pointer to the CSV!)
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Matt Venn

06/15/2021, 6:14 PM
where's your config.tcl?
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Matthew Ballance

06/15/2021, 6:15 PM
Here's what I'm currently working with:
Copy code
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#      <http://www.apache.org/licenses/LICENSE-2.0>
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# SPDX-License-Identifier: Apache-2.0

set script_dir [file dirname [file normalize [info script]]]
source $::env(SYNTH_DIR)/../../../caravel/openlane/user_project_wrapper_empty/fixed_wrapper_cfgs.tcl

set ::env(DESIGN_NAME) user_project_wrapper

set ::env(FP_PDN_CHECK_NODES) 0

set ::env(CLOCK_PORT) "wb_clk_i"

set ::env(CLOCK_PERIOD) "10"

set ::env(PL_OPENPHYSYN_OPTIMIZATIONS) 0
set ::env(DIODE_INSERTION_STRATEGY) 0

set ::env(MAGIC_WRITE_FULL_LEF) 1

# save some time
set ::env(RUN_KLAYOUT_XOR) 0
set ::env(RUN_KLAYOUT_DRC) 0

# magic drc checking on the sram block shows millions of false errors
set ::env(MAGIC_DRC_USE_GDS) 0

set ::env(PL_RANDOM_GLB_PLACEMENT) 1
set ::env(SYNTH_TOP_LEVEL) 0
set ::env(MACRO_PLACEMENT_CFG) $::env(SYNTH_DIR)/macro.cfg

set ::env(GLB_RT_OBS) "li1 0 0 2920 3520"
set ::env(GLB_RT_ALLOW_CONGESTION) 1

# Playing with different extraction settings...
set ::env(YOSYS_REWRITE_VERILOG) 0

set ::env(GLB_RT_ADJUSTMENT) 0.7
set ::env(GLB_RT_L2_ADJUSTMENT) 0.9
set ::env(GLB_RT_L3_ADJUSTMENT) 0.7

set ::env(GLB_RT_MAXLAYER) 5
set ::env(ROUTING_OPT_ITERS) 80

set ::env(CLOCK_TREE_SYNTH) 0
set ::env(ROUTING_CORES) 10
set ::env(PL_TARGET_DENSITY)     0.09


set ::env(FILL_INSERTION) 0
set ::env(TAP_DECAP_INSERTION) 0
Note that I have a wrapper script that supplies the source files
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Matt Venn

06/15/2021, 6:16 PM
can you upload the lvs?
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Matthew Ballance

06/15/2021, 6:20 PM
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Matt Venn

06/15/2021, 6:23 PM
it looks to me like like the sram isn't getting connected
all the nodes look disconnected
I would ask @Matthew Guthaus or @Tim Edwards to take a look
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Matthew Ballance

06/15/2021, 6:27 PM
@Matt Venn, when you say the nodes look disconnected, which file are you looking at? Looking in the .v, I see .dout1 on the SRAMs is disconnected (has NC* nets), but the others appear to be connected.
BTW, really appreciate you having a look, Matt.
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Matt Venn

06/15/2021, 6:39 PM
so the .v is the post synthesis netlist
and that's one side of what goes into netgen, which does the LVS
the other side is the spice netlist that's extracted by magic
so if magic extracts the netlist and for some reason it doesn't see the connection between a wire and the memory (for example there used to be issues with the size of the memory pins), then netgen will spot the error
one of the shortcomings of netgen is that once it gets knocked out of sync, then often a lot of the rest of the report is nonsense
are you using the latest sram macros?
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Matthew Ballance

06/15/2021, 6:42 PM
Oh... I saw that @Tim Edwards updated the pin sizes on the SRAMS in the main repo, and I hadn't yet updated.
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Matt Venn

06/15/2021, 6:42 PM
I know that Matt G has updated them recently
oh well that's the first thing to check
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Matthew Ballance

06/15/2021, 6:42 PM
Also good know that one error can cause a cascade.
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Matt Venn

06/15/2021, 6:42 PM
absolutelyt
that's why I always ask about routing first
majority of my lvs issues have come from that and I wasted a lot of time trying to debug later on in the flow
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Matthew Ballance

06/15/2021, 6:43 PM
Yeah, I don't recall running into any LVS issues last time around. Not the case this spin...
Updated the mems, and re-running now with fingers crossed.
Hmm... Unfortunately, updating the SRAMs didn't appear to improve anything. In looking through the 'disconnected node' messages in the log, it appears that most, if not all, pins of all macros in my top level are listed as disconnected...
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Tim Edwards

06/15/2021, 8:53 PM
@Matthew Ballance: The "disconnected node" messages probably aren't meaningful. They are just reflecting the fact that the subcell is an abstract view and the pins aren't connected to anything (I recently tried to suppress that message in the case of black-box views but there were issues that make it hard to correct, so it is still doing it, for now).
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Matthew Ballance

06/15/2021, 8:54 PM
Thanks, @Tim Edwards. I notice a lot of power-pin mismatches at the beginning of the log, and believe I saw another similar report. Any clues there?
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Tim Edwards

06/15/2021, 8:59 PM
I pulled your log file you posted above, and I don't see anything in particular until the top level. There is definitely some issue with power connections, as the top level has separate nets for well and substrate than for power and ground. That suggests that you don't have tap cells in the layout.
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Matthew Ballance

06/15/2021, 9:18 PM
Hmm... Looking up through the log (output from running the flow), I do see a warning "Skipping Tap/Decap Insertion" right after macro placement. Where would I look to understand why tap cells aren't in the layout?
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Tim Edwards

06/15/2021, 9:22 PM
That's a question to ask in #openlane . I don't have that detailed knowledge about the internal actions of OpenLane.
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Matthew Ballance

06/15/2021, 9:22 PM
Will do, @Tim Edwards. Appreciate your help!
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Matt Venn

06/16/2021, 9:44 AM
@Matthew Ballance maybe you could try a more simple openlane config? I noticed you have made quite a few changes to it that could be affecting things like this. Or are all the changes you've made to already solve other issues?
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Matthew Ballance

06/17/2021, 1:27 AM
@Matt Venn, unfortunately there are lots and lots of knobs to turn... I started off with the config in caravel_user_project/openlane/user_project_wrapper. That one had Tap/Decap insertion turned off, which clearly is a problem in my situation. Good news is I'm learning new things all throughout the process 😉