Hi all, One silly question: 😁 Does Sky130 mean the length of the MOSFET transistor channel is 130nm? So why the DRC is saying it must be 150nm? I’m a little bit confused.

possible that the drawn length is not quite equal to the effective length with some mask shrinkage. That's just a guess though

@User most of the time the drawn L is not the same as the actual L

But how do they calculate how much larger should be it? Is it experimental?

@User This a technology related thing. It's driven by the lithography used inside the foundry. It's usually a ratio to the Gate length

@User “It’s not calculated (so it’s experimental)“. That’s exactly what I was looking for. Thank you.

It's not experimental as well

@User Oh, got it! Do you have such an experiment by yourself in real world? Or you learned about it at the uni. ?

@User I have about 16 years of experience in chip verification and working with foundries

@User You answered my question, thanks a lot. It will GREAT to learn about it on YouTube. Thanks a million for your help. It was my pleasure to talk with you.