Definitely possible (but as said, challenging) for flash cells, I don't think it is possible for SRAM cells, it is possible (although extremely difficult) for Dynamic RAM.
It is worth noting that sky130 is not an advanced process node, so any memory implementation will not be even close to densities that are achieved with current aggressive process nodes. Moreover a multilevel sensing usually trades speed for density.
Memory macros are usually placed as support modules for digital ASICs (processors, DSPs), using 1 bit /cell allows to use well known generators and reliable implementation.