@User: The accepted procedure is to prepare a layout of the analog part(s), then generate a LEF abstract view of each analog block so that they become macros as seen by Openlane. Then Openlane can handle all the digital and also the placement and routing of the analog blocks. There is a way to tell OpenROAD to use wider routes for specific signals, although I do not know is whether that capability has been incorporated into Openlane. In the worst case, after importing the top level DEF generated by Openlane into a layout, you can patch up the analog signal routes manually. I did this for the padframe on Caravan. Openlane placed and routed the padframe internally, and then I edited the layout and removed the tiny digital routes it made to the analog pads and replaced them with wide metal connections.
Because the Caravel chip build procedure assumes that the design is digital, it is easier to work with Caravan for analog and mixed-signal designs. Otherwise, although Openlane will handle a macro inside a big digital block, the analog will be buried in the middle of the digital with digital power routing all around it, which is not exactly the best environment for an analog circuit. In the Caravan chip, you have just a big empty space in the middle and you can get Openlane to do place & route like a top-level assembly, without constraining everything to standard cell tracks and unit sites.