<@U017UPJEGKZ>: The I/O pads should be very well ...
# analog-design
@User: The I/O pads should be very well protected from ESD events. You should not need any additional ESD structures unless you are using the analog version of the harness.
I am planning on using the analog harness. But the analog harness keeps all the I/O the same except for the small set of pins that are ~almost bare pads, right?
Right now I am working on modeling the normal I/O pins for low speed analog signals (I was also hoping to copy the second pass ESD structure for what I need to do on the bare pads)
However, I do not see any sort of second pass ESD structure on pad_a_esd_0, which is the pin for analog access on the normal I/O pads, which is why I am getting confused.
Based on the reading I have done and the people I have talked to, a second pass ESD structure is required to clamp the remaining transient and protect the gate oxide after the first ESD clamp.
I can see structures that appear to be related to a second pass ESD structure this on the analog mux so I don't think this is some special case where a second pass ESD structure is not needed for this pad design / pdk. I am seeing some weird things with the netlist for the IO, but I also looked over the layout in magic and did not see anything that could be construed as a second pass ESD structure onpad_a_esd_0 , just the 150 ohm poly resistor
Yes, it's generally a good idea to have another diode or diode pair on the inside of the resistor, and it should be close to the gate. That may be why there isn't a diode there as part of the pad cell.