@User Do you know what substrate type the Google runs use (epi versus non-epi)? It makes a difference for the analog folks in terms of guard ring strategy. From the SkyWater website, it seems that they offer all options, but I don't know which one is used for the upcoming runs. https://www.skywatertechnology.com/technology/mixed-signal-asic/

I'm unable to find any information in the SkyWater documenatation stating whether the wafer is epi or non-epi. Would there be a parameter (i.e., SPICE model parameter) that would make this obvious? Otherwise I'll just ask somebody at SkyWater.

The spice models are not affected by this, so it would be great if you can ask. Thanks!

Dr. Murmann, I was wondering what is deriving this question, Quality of the silicon layer an possible variation on the device parameters?

As I wrote, it has to do with how one deploys guard rings. For an epi-substrate, it is counterproductive to densely sprinkle p+ substrate tabs everywhere, while these are desired in the non-epi case for substrate noise suppression. This is covered in the literature, see e.g. https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=210024

Dr. @Boris Murmann, Aren’t you worried sir about the Latchup even in the case of epi? I didn’t check the DRC if it includes LU checks.

No.

Seems there is no rules.

@Amro Tork: There is a latchup rule set; the latchup rules are 15um distance between tap contact and edge of related diffusion, with a secondary rule of 6um distance if the area is within 50um of the padframe cells.

@Tim Edwards I searched the Skywaters Readthedocs. But my basic search didn’t get that one. Could you please share the rule name/number?

@Tim Edwards Just wondering if you've been able to find out about the substrate type from SkyWater (non-ep versus epi)? Thanks!