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#analog-design
Title
# analog-design
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Tom

05/08/2021, 4:13 PM
@User, I have some "half layouts" in my design which get mirrored and in some cases it's ideal to have e.g. vie cell instances on the mirror line which will result in those cells exactly overlapping at the top level on the axis of symmetry. Will this cause a problem when the design goes through the thorough checking phase or can I assume it's ok it it doesn't violate magic's DRC rules?
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Tim Edwards

05/08/2021, 4:16 PM
Yes, that's fine. The only thing you can't do is to split a via in half. As long as you have full vias overlapping exactly between array rows and/or columns, it's good.
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Tom

05/08/2021, 4:16 PM
Great. Cheers!