Resolved. Added the

ignore shorted

command to the overall setup script I was using.

You shouldn't need to do that. I put dummies in layout and schematic all the time and manage to get clean LVS reports

I was running into an issue when I had multiple lengths of resistors and each resistor had its pins shorted to ground. You've done stuff like this without issue?

Oh I'm sorry. I assumed you were talking about FET dummies. @Tim Edwards fixed an issue relating to dummy transistor fingers a few days ago. Perhaps there's a similar issue for other components?

@Tom: The issue here was how to put

ignore shorted

in the setup file. FETs have the problem that if you short source and drain but not the gate, it's a MOScap, not, strictly speaking, a dummy device, and should be included in simulation. That's why netgen insists that all pins must be shorted together on a device before it will treat it as something that can be ignored.