https://open-source-silicon.dev logo
#analog-design
Title
# analog-design
b

Boris Murmann

06/14/2021, 10:14 PM
@User I am just speculating, but getting the low Vt may force them to omit/alter the the pocket implants, resulting in punchthrough for the minimum L at at large VDS. I would not experiment with the minimum L if you need to sustain reasonable large VDS.
s

stefanoaz

06/15/2021, 2:35 AM
That makes sense, although these are the 1.8V devices. My max Vds would not exceed Vdd minus a vsat, but if it's a reliability issue I'll respect it.
b

Boris Murmann

06/15/2021, 2:40 AM
It's not really a reliability problem since punch through is not destructive. It's just that the transistor shorts out for large VDS. The depletion regions of the two pn junctions will touch, and this is why larger L is required.
s

stefanoaz

06/15/2021, 2:46 AM
Thanks for that differentiation Boris. When I hear punch through I think of the gate. But here it's a signal-dependant Vds short. To be avoided.....