This is the transient variation of the LDO output ...
# analog-design
m
This is the transient variation of the LDO output with varying supply from 0 to 2.2v in 1uS .. can this be considered as a stable response where it only needs settling time or it is an unstable response due to the overshoot at the start?
l
I had a surprise with a LDO design some months ago. There was no oscillation in the transient simulations until I used a smaller time step. The simulation you made shows no sustained oscillation. It may be good. You may try it with and without the load.
m
Without the load more settling time and larger overshoot but it reaches the steady state value.However, the phase margin is 40 deg. in no load >> at full load the overshoot is much smaller and phase margin is large than 90 degrees
l
It must be ok then. I don't know how is your circuit, but if you use a two stage amp in your loop, it can be unstable. Even an single stage amp can lead to instability in the closed loop, depending on the load. Are you measuring the phase margin by using the transient analysis overshoot? With cadence software, it is easy to see the open loop gain and margin of a closed-loop. With ngspice, I don't know how to do that. If you decrease the time step and the oscillation grows, be extra careful.