I'm working on a video about the internals of flip...
# analog-design
m
I'm working on a video about the internals of flip flops. I can use a loop to iterate over the metastable region and show how the output takes longer to settle. I'm wondering if there's a way to get ngspice to solve for the longest settle time and tell me the d vs clk time delta?
k
Lecture number 13 of the below course does this. It has the circuit setup and stimulus to do that. Hope this helps https://www.udemy.com/course/vlsi-academy-library-characterization-part-1/
f
I know how to do it in Ocean and Cadence Virtuoso. There are some function to compute delay between two edges which can than be done as on a results for a sweep variable e.g. clock delay. I suppose one should be able to similar thing using meas (chapter 17.5.43) but I don't have experience with that. Alternative is to use PySpice and do postprocessing on the results using python.