I don't use schematics for my designs at all, as I make my layouts and extract their netlists for my simulations. But they are very simple designs with very few transistors. For top level design, using several of those instances, I would like to use XSCHEM. How do I make symbols for an extracted netlist, instead of a schematic, so I can use it with XSCHEM?

You are talking about "automatic schematic generation", or "ASG", the generation of schematics from netlists. This is not a trivial problem. In the absence of ASG, you will end up having to draw the schematic by hand.

I was just asking how to making a symbol representing the extracted spice netlist, not a schematic generation from the netlist. This way I can use the extracted netlist inside a testbench using XSCHEM, for example. I've seen some schematic generation in Virtuoso and that was ugly...

you just make a symbol in xschem in the same way you make any other primitive symbol and pointit at the .subckt of your extracted netlist