Does anyone remember what error causes the `synthe...
# openlane
t
Does anyone remember what error causes the
synthesis_preroute.v
file to have the power pins included (which causes OpenSTA to throw tons of
port VPWR not found.
) ?
a
Isn't that because they are globally connected in common_pdn.tcl in open_pdks?
t
@Ahmed Ghazy yeah, it is, I just traced that down 🙂
I'm not on the very latest
open_pdk
where that was made optional.
(and didn't notice on my design because I have a custom
pdn.tcl
)