open-source-silicon.dev

Hi all, I thought you might be interested in this. I've run a couple of experiments with OpenLane &amp; Sky130:
1. ADDER_TYPE comparison.
2. Resizer Vs OpenPhySyn comparison.
3. Synthesis Strategies comparison.
I'm sharing the results here: <https://docs.google.com/spreadsheets/d/1hmsmxpW9iaq0NfHA3fme3cl6m87pZ5Xs_pFltLCJQUE/edit?usp=sharing>
I'll be conducting more experiments over time and adding them to the same spreadsheets.

Nice work <@U01634FSETZ>! Lots of interesting stuff to look into. I'm guessing this wasn't using the `openroad_update` branch, and even if it was, it doesn't have the recent resizer fix <https://github.com/The-OpenROAD-Project/OpenROAD/commit/df1041a256fd9603f45fa58c2fc61c1de447b623>

It could be interesting to look at OpenPhySyn vs Resizer with that (might be another issue or two we need to find in the Resizer)

Most of the FA/FCA/yosys adder tests matched what I saw:
• RCA has less area but much worse timing than RCA and yosys (expected)
• FA and yosys are similar in terms of timing (expected)
• FA has a little less area than yosys (expected)

There are a few unexpected things in there, eg `sha512` where RCA has much better wns than FA or yosys