HI, my build fails placement/ routing of clock, th...
# openlane
b
HI, my build fails placement/ routing of clock, the messages are below -
Copy code
[INFO GRT-0017] Found 0 clock nets
[WARNING GRT-0010] FastRoute cannot handle net XCLK due to large number of pins
[WARNING GRT-0011] Net XCLK has 65748 pins
[ERROR GRT-0057] Net XCLK not properly covered
Error: or_replace.tcl, 94 GRT-0057
[ERROR]: during executing: "openroad -exit /openLANE_flow/scripts/openroad/or_replace.tcl |& tee >&@stdout /project/openlane/darksocv/runs/darksocv/logs/placement/5-replace.log"
[ERROR]: Exit code: 1
Does anyone have any info on this ? Thanks
m
It says it can't handle clocks that big
Did you synthesize a memory? Maybe use DFFRAM or an OpenRAM memory
b
Thanks I am synthesizing a memory, let me see, thanks