open-source-silicon.dev

Hi, is there any option to specify different metal layers for IO pins (instead of metal 2, 3 as default)? My design (a FPGA tile) has about 500 IO pins, so it would be better (for density/core ultilization) if I can assign the IO pins using different metal layers (ex. met2, 4 for top/bottom and met1, 3 for left/right)? Currently, the flow only run with FP_CORE_UTIL=10

LUT4AB.placement.def.png

<@U01680FK487> Hi Manar, as <@U016EM8L91B> pointed me to you for this issue, do you have any suggestions? Thanks

Hi <@U01L8BR7FFA>, you can check these two variables
`FP_IO_HMETAL`  and `FP_IO_VMETAL` . They specify the vertical and horizontal metal layer for the IOs. Documentation is here <https://github.com/efabless/openlane/tree/master/configuration#floorplanning>

<@U01680FK487> seems it works with multiple layers (ex. set `::env(FP_IO_HMETAL) "2 4"`). Also is there any options to specify the pitch and/or space between IO pins for each metal layer? Thanks

<@U01L8BR7FFA> The min_distance between the IOs is hardcoded to 5 here <https://github.com/efabless/openlane/blob/master/scripts/openroad/or_ioplacer.tcl#L48> . It is not currently exposed as an environment variable but you can directly change it.

<@U01680FK487> Yes, I’ve changed to min_distance to 1 but seems the tool only spread all the pins equally along the edge? just asking if the tool currently is allowing place IO pins in groups with a predefined metal layer?

I see there is a variable `FP_IO_MODE` 1 (default) = random equidistant, 0=matching mode - what does it mean? Thanks

<@U01L8BR7FFA> The min_distance applies to all pins yes. Currently, there is no way to group certain IOs, but you can specify which pins to be placed north/south/east/west using a `PIN_ORDER` cfg file. The new openroad app allows for more control on the io placement but it is currently not integrated with openlane. The random mode will place the pins randomly. I think the matching mode will place the pins in a way that minimizes the wire length.