Eldrick Saleh Millares
05/26/2021, 1:59 AMmpw-two-c
on caravel_user_project
and I am on v0.15
on openlane
I am running make user_project_wrapper
with my own design instantiated in user_proj_example
I noticed that in 1-yosys
I will get about ~200 warnings that say every output wire in user_project_wrapper
is used but has no driver (screenshot below) even though these wires are driven by my logic / driven to a constant value.
Any suggestions on what is going on here?Matt Venn
05/26/2021, 12:00 PMEldrick Saleh Millares
05/26/2021, 5:39 PM