take a look a the lvs.lef.log - should make it obvious which pins are missing

Thank you. I checked this file and it shows power nets are missing in circuit 2. I need to change config.tcl

have you included the power rails in the config.tcl for your design as in the example user_proj_example?

Yes I did. But it is not consistent as the power net in the wrapper.

@Yuanpeng Liao I think the power pins of the subservient aren't connected from the top level. You can check this by viewing the layout in klayout and making sure that at least 8 metal 5 straps overlap with the macro.