https://open-source-silicon.dev logo
#openlane
Title
# openlane
h

Hadir Khan

08/02/2021, 10:26 AM
Hello everyone, I have a small design (Multiplexer) that I am taking down the openlane flow. I am getting LVS errors. Seemingly there are mismatches related to decap cells. I have attached the log file for reference.
m

Mitch Bailey

08/02/2021, 10:59 AM
@Hadir Khan Looks like it's not reducing what should be parallel decap_3 in the layout. Can you post the result of
Copy code
grep -C 2 decap_3 <path>/results/magic/m21*spice
where <path> is the directory from the openlane flow (probably something like
m21/runs/<tag>
).
h

Hadir Khan

08/02/2021, 11:16 AM
@Mitch Bailey I have attached the screenshot
m

Mitch Bailey

08/02/2021, 11:29 AM
@Hadir Khan Looks like you're missing the top level power connection to VPWR in m21. Your power net is probably not getting routed. Not sure how to fix that.