Paweł Sitarz
11/07/2021, 9:35 PMset ::env(CLOCK_PORT) "wb0_clk_i wb1_clk_i ram_clk0 ram_clk1"
But this results in this error during hardening:set ::env(CLOCK_PORT) [list {wb0_clk_i wb1_clk_i ram_clk0 ram_clk1}]
I'm getting this error:Matt Liberty
11/07/2021, 11:04 PMMitch Bailey
11/08/2021, 1:35 AMcreate_clock
command creates a virtual clock driver for the pin or pins at the end of the command. To create multiple clocks (say at different frequencies), I'm assuming it's necessary to use multiple create_clock
commands defining different clock periods. Do you know if this is possible with the current openlane config.tcl
configurations?Matt Liberty
11/08/2021, 1:45 AMPaweł Sitarz
11/08/2021, 9:26 PMset ::env(CLOCK_PORT) [,
with each line having only one clock signal mentioned, is that what you mentioned? Won't last clock mentioned in config.tcl overwrite previous signals?