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#openlane
Title
# openlane
n

Nguyen Dao

03/02/2022, 9:17 PM
Hi ALL, how to disable the report_power during STA? I tried `set ::env(STA_REPORT_POWER) {0}`but it does not work? Any idea why the flow is stuck at report_power step? Thanks
m

Matt Liberty

03/02/2022, 11:47 PM
I don't think there is an option. You could just locally hack the scripts to skip it.
n

Nguyen Dao

03/03/2022, 9:37 AM
@User I added if-statement in the scripts/openroad/sta.tcl before the power report but it does not change anything? Is there elsewhere should I change?
Copy code
if { [info exists ::env(STA_REPORT_POWER)] } {
    puts "power_report"
    puts "\n==========================================================================="
    puts " report_power"
    puts "============================================================================"
    report_power
    puts "power_report_end"
}
j

Janani Aravind

03/04/2022, 10:39 AM
Hello, I'm seeing the same issue. I tried disabling the set::env(STA_REPORT_POWER) {0} and still seeing the sta error. Herewith, attaching the same.
👀 1
r

Ruediger Ehlers

03/06/2022, 1:13 PM
Hi @User For the "Unexpected REG" during STA, I just had the same problem. It was cause by having "set ::env(SYNTH_TOP_LEVEL) 1" in "config.tcl" despite having a bit of glue logic in the wrapper.
j

Janani Aravind

03/06/2022, 1:14 PM
Thanks for letting me know. I appreciate that. I will change the settings and give it a try.
r

Ruediger Ehlers

03/06/2022, 1:23 PM
Oh, and to explain why that makes a difference: There were some yosys warnings before that stating that some processes have not been translated to gates(?). This is because the "synth_top.tcl" file with commands for yosys, that is used when SYNTH_TOP_LEVEL has a value of "1" does not have a command to map processes to gates. This then causes the step afterwards to choke on the resulting verilog file that contains uncompiled processes. If setting SYNTH_TOP_LEVEL to 1 doesn't work for you now, check if you have some yosys warnings about processes before the actual error.
j

Janani Aravind

03/06/2022, 1:24 PM
Oh! Makes sense. I want aware of this. Thanks for the info. Sure, will check