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Dear all, can OpenLane work with VHDL-based source...
# openlane
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Anas Alsakkal
03/30/2022, 4:21 PM
Dear all, can OpenLane work with VHDL-based source files? or I have to convert all VHDL files to Verilog? If so, are there any recommended VHDL-->Verilog converters? Thanks. Anas
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Matt Venn
03/30/2022, 4:27 PM
https://docs.google.com/document/d/1RAQWjmxpJndlEJdLWXK8irIqWuYTstqu7pU3tOIFccc/edit
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Anas Alsakkal
03/31/2022, 4:11 PM
Brilliant! Many thank
@User
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Jorge Marin
09/10/2024, 8:26 PM
@Daniel Arevalos
fyi
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