https://open-source-silicon.dev logo
#general
Title
# general
a

Arman Avetisyan

01/19/2022, 4:44 PM
Just use Xilinx Vivado or other tool to synthesize your design to see how much resources you need
👍 1
a

ANMOL SAXENA

01/21/2022, 3:07 PM
Table.xlsx
Based on this, i multiplied the LUTs by 6 and got a rough estimate of 200,000 for being safe.
a

Arman Avetisyan

01/22/2022, 10:03 AM
I think your calculation is wrong. 25.8k is more reasonable.
Look at the Digikey and find an FPGA that can has that many slices. I would go with +50%, so around 45k slices
👍 1