@Anton Blanchard: Hopefully somebody will come out soon with a report of everything that is wrong with the MPW-two build. . . it's a pretty long list. I found an error in which the derating factor was set to 250% (was supposed to be 2.5%---somebody failed to convert between a percent and a fraction). The bit-bang interface should be ignored as false paths because it is not intended to be run at the same time as an automatic configuration. That would definitely cause signal collisions and timing violations all over the place. It's assumed that you don't try to do both at the same time, and that the bit-bang interface is necessarily so slow that it would never cause a setup violation, and any hold violations would be the same ones as calculated from the serial clock derived from the core clock. Ultimately, the problem has already been corrected in the RTL code (for future MPW runs) by re-clocking the last data output of every GPIO block with the negative edge of the serial clock, so that there is a full half-period between clock and data rising edges, which is a way to avoid hold violations by design.

Thanks Tim.

@Tim Edwards The derating comment is not an accurate one. The posted issue appeared only in a recent sign-off script used in debugging. It has nothing to do with the implementation nor the sign-off constraints of mpw-2 Caravel. The original SDC and log files in Caravel github repo (mpw-2b branch) do not have this issue.

@mshalan thanks. A few projects have been using the same methodology (including our Microwatt processor submissions), so this will affect them too unfortunately.