@Mitch Bailey sorry to disturb, I need little help in layout I made transistor of width 600um I do not understand what is this device mismatch during lvs check could you please help me out. (Please suggest me if there is any other way of doing layout for large width transistor)

It doesn't make a difference in LVS, but I think

nf=1

will make a difference in simulation. You probably want

nf=60

@Mitch Bailey Thank you

@Kamta Kesharwani the body connection (bulk terminal) of NFETs is usually GND. This is always the case in cmos processes unless you draw the transistor into an insulated p substrate with an nwell ring all around and a buried nwell underneath. So for this check connect the body terminal to GND or whatever the ground supply you are defining (VGND ?). You probably need also to add a GND/VGND tap on the substrate in the layout, however i leave the details to people that are more experienced on sky130 design rules.

@Stefan Schippers Again same thing after connecting VN (source and body) to GND

May be you need to add pins/labels on the layout? I am not doing much layout work on sky130 so i am not the right one to ask :-)

Ok

What command are you using for LVS? Your parameters for the mosfet should probably be

nf=60 W=60x10 L=0.15

@Mitch Bailey After making layout i am giving the command 1 save 2 extract all 3 ext2spice Then Opening netgen Lvs "file name 1 file name 2"