Hello, I’m getting the following DRC error while t...
# sky130
r
Hello, I’m getting the following DRC error while trying to tapeout stage on efabless:
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STDERR: [ WARN ] FOM Density Check Result: 'caravel_2411b992.oas' has 37 DRC violations.
Can somebody help?
t
Are you doing anything special in that project ?
r
I’m not sure what do you mean by special. But the project is only a few digital blocks
d
@Rafael Oliveira your diffusion/tap density is either too high or too low. Request the log files and look in the logs/klayout_fom_density.log file. That is a tiled check. A 700x700um window is stepped across your die in 70um steps. The FOM (diff/tap) density in each window needs to be > 30% and < 60%. If you give me permission I can take a quick look at your layout on our server and let you know the cause.
Back to the log file. Each tile violating the rule is listed. The min and max numbers are listed at the end of the file.
r
Thanks for the answer @David Lindley. I already requested the log files to investigate. I would appreciate if you can take a look into my layout.
d
Can you provide your user name?
r
My username is: grouposiris
d
Which project?
r
IC3-CASS-2024
r
All the dessity violations in the klayout_fom_density.log presents the following message:
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fom density below 0.33 : 621/2730 is 0.3290 for tile ((630,2520;1330,3220)), area = 490000
So, I guess it is bellow 30% margin
d
This represents one tile. The density in this tile is 32.9%. I'll allow this number. But, you have tiles as low as 27%. Those are failing.
r
There are only 37 ocurrence of them
d
Yep, but that is a hard failure at Skywater. They will kick your chip out for that.
r
Well, how could I fix that density problem? I do not want my chip kicked out rsrs
d
I loaded your layout in klayout and the error marker file. This is a small example of the layout. The large gaps between the diff/tap are causing the problem. There are no diff/tap in there, but the wells are too small and close together for our fill algorithm to put fom fill there. I looked an the problem is caused by the the sky130_fd_sc_hd_fill_8 used. Probably the rest of the fill, too. There is no diffusion in the fill cell. See second screen shot. The fill cell should look like the third screen shot. I do not know why your fill cells do not match what is in the most current PDK. What PDK version are you using?
I checked the output of your mpw_precheck and the cells are the same there. This is the PDK version we are using.
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0fe599b2afb6708d281543108caf8310912f54af (2024.08.17) (enabled)
Run the command
volare ls
to see which version you are using.
Find out what the osiris_i_wrapper designer did different. That one has the correct fill cells.
@Rafael Oliveira I meant to say these errors are only in the
user_proj_example
block.
r
The PDK version I'm using
Thanks for the answer @David Lindley. We will fix the user_proj_example.
d
Your PDK is 16 months old. I suggest updating to the one I suggested.
r
All right
j
@David Lindley The makefile in the caravel_user_project repo still uses the "78b7..." Commit. That's why most of the people have that version i think !
d
You're right. I don't know if that is for sure the source of the error. The osiris_i_wrapper does not have the problem and the user_proj_example does. The user_proj_example must be updated to meet the FOM density rules.
j
It seems like they didn't include the "decap 3 fill1 fill 2" constraint in the user_project_example config
d
That would fix this issue.
Assuming the decap_3 cell had the correct diff/tap in it.