I have two pre hardened macros. When I try to integrate them into user_proj_wrapper it works without any issues. But if I do the same thing with a smaller area, and less number of pin version of user_project_wrapper I'm getting very small hold violations in exactly one input port. What can I do?

Do you have buffering enabled at the top level? Maybe placing the macro differently would effect the input wire length and the timing. Can’t offer any concrete advice without more detail. (config file, layout, timing violation, etc.)

If you meant "synth_buffering" ,it is turned off in the user_proj_example config by default, I wonder why though !

@Jazoolee Ahamed I’m sorry, I don’t know. It appears that either

SYNTH_BUFFERING

or

SYNTH_SIZING

is used with

SYNTH_BUFFERING

being the default. See here. Could you check the final configuration settings in the expanded in the

runs/<time_stamp>/config.tcl

file?