Does post layout simulation work for the reram mod...
# reramk
Konnor Kivimagi
10/20/2024, 3:07 PMDoes post layout simulation work for the reram model? When I reset the device the output does not change. Im curious if I am doing something wrong or if the model doesnt support that.
a
Akash Levy
10/20/2024, 4:38 PMYeah it should be supported. Post-layout just means there are parasitics extracted right?
Akash Levy
10/20/2024, 4:38 PMMaybe something went wrong with parasitic extraction?
Akash Levy
10/20/2024, 4:39 PMYou might need to manually put the RRAM model into the parasitic extracted netlist
Akash Levy
10/20/2024, 4:39 PMI don’t think it will extract an RRAM device from your layout automatically
k
Konnor Kivimagi
10/20/2024, 4:50 PMThat could be it, I'll take a look into that. Thanks 👍🏼
Konnor Kivimagi
10/21/2024, 2:17 AMIs there somewhere I can find this model? This is the netlist I have now I am unsure if it is the correct one or not.
a
Akash Levy
10/21/2024, 7:00 AMThis extracted netlist looks good. You need to get the Verilog-A model and link that
k
Konnor Kivimagi
10/22/2024, 12:59 AMHow can I find and link to it? I'm not entirely sure what that means sorry.
a
Akash Levy
10/22/2024, 1:06 AMAkash Levy
10/22/2024, 1:06 AMGenerally speaking all the ReRAM stuff is in this repo: https://github.com/google/skywater-pdk-libs-sky130_fd_pr_reram/tree/main
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