The nets are matching for lvs in "netgen". The comp.out is listed here. But many parasitic devices are added, although no of acive and passives are same. Can i stll run the extracted netlist, with a testbench?

@Antaryami Panigrahi When creating the spice netlist from the extracted data in magic with

ext2spice -o <file> <top>.ext

be sure to first set

ext2spice lvs

.

@Antaryami Panigrahi: "_Can i stll run the extracted netlist, with a testbench?_" That depends on what you want to do with the netlist. Generally, a netlist for LVS is generated without parasitics, since it is difficult to impossible to accurately represent parasitics in a schematic. The extracted netlist from magic used for LVS can be simulated; you will get a functional simulation that will tell you roughly that your circuit works as expected (or doesn't). If you want an accurate simulation, then you should re-extract a netlist with full R-C parasitics. But that netlist won't be useful for LVS.

@Tim Edwards As per my last information, magic could extract only

C

on layout with sky130. Is it possible to extract

R

or

R+C

or

R+C+CC

now. If yes, please share the command for that.

@vks See this discussion.

@Tim Edwards Thanks for a lucid explanation.