Im trying to design a 2 stage OTA with 1.5 Vdd, I ...
# analog-design
j
Im trying to design a 2 stage OTA with 1.5 Vdd, I picked sky130lvt device, I tried designing it but the tail curr source has to be sized very large to meet the headroom requirements. Is there a better way to do it. Thank you
t
The better way to do it is not to try to design an OTA with a power supply of 1.5V on a 130nm process. It's practically impossible.
j
The BGR spec I'm designing it for demands min Vdd=1.5
t
I don't know if you are designing a true bandgap or a CMOS voltage reference, but you can use this as a guide: https://github.com/efabless/sky130_ak_ip__cmos_vref . Its minimum power supply spec is 1.62V. The amp differential input pair is cascoded with NVT transistors, which may be the design trick you need to make it work.