Charly Meyer
07/02/2024, 10:37 AMMitch Bailey
07/02/2024, 12:56 PM$$$CONTEXT_INFO$$$
cell has duplicate definitions of some cells that are being ignored.
If you’re getting a
'LVS result: Final result: Circuits match uniquely.'
message, where is LVS failing?
Could it be failing because there are missing cells in the source?
Can you share your LVS_check.log
file?Charly Meyer
07/02/2024, 2:45 PMMitch Bailey
07/02/2024, 4:03 PMLVS Done.
Warning: device level LVS may be incomplete because 2 cell(s) was/were ignored: see /opt/input/myproject/test_lvs_d/precheck_results/02_JUL_2024___14_24_17/tmp/ignore.glob
LVS problem: check the following files
/opt/input/myproject/test_lvs_d/precheck_results/02_JUL_2024___14_24_17/logs/ext.log
/opt/input/myproject/test_lvs_d/precheck_results/02_JUL_2024___14_24_17/logs/lvs.log
/opt/input/myproject/test_lvs_d/precheck_results/02_JUL_2024___14_24_17/outputs/reports/lvs.report
LVS ends with a non-zero error code if there are cells that ignored. What is in ignore.glob
?Charly Meyer
07/03/2024, 1:23 PMsky130_fd_pr__special_nfet_01v8
instead of sky130_fd_pr__nfet_01v8
because the size of the transistors is too small. I ignored the subcircuit containing sky130_fd_pr__special_nfet_01v8
, and the LVS showed no errors in the log, but it failed in the precheck. Then I decided to change the name of the transistor to sky130_fd_pr__special_nfet_01v8
(in another SPICE file), and the same thing happened. The log said the circuit matched, but the LVS in the precheck failed.Charly Meyer
07/03/2024, 1:25 PMio_eob[i]
to Vss and Vdd. I added a resistance on the layout to avoid pin conflicts and included this resistance in the netlist. I removed the subcircuit from "LVS_IGNORE". The log indicates that the circuit matches uniquely, but the LVS fails in the precheck.
The log says, "The following cells had property errors: {Dff$1}"
but I don't know if this is important. Above all, I don't know how or where to change this property.
And thanks for your help again 😉Tim Edwards
07/03/2024, 1:26 PMMitch Bailey
07/03/2024, 2:49 PMI ignored the subcircuit containingprecheck LVS finishes with no errors if the layout and the schematic match. When you use ignore cells, LVS might finish with no errors, but precheck does not consider this to be a true match (because cells were ignored)., and the LVS showed no errors in the log, but it failed in the precheck.sky130_fd_pr__special_nfet_01v8
The log says, “The following cells had property errors: {Dff$1}”
but I don’t know if this is important. Above all, I don’t know how or where to change this property.Search the LVS report for the
Dff$1
. It should list the devices that have mismatched properties.Charly Meyer
07/04/2024, 8:25 AMTim Edwards
07/05/2024, 12:34 PM