<@U03DNPRUBFD> just some questions. 1. in the 2 sc...
# analog-design
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@Faedra Webers just some questions. 1. in the 2 schematics are Vdacp and Vdacn expected to be the analog conversion of B9,B8,...,B1 ? 2. Normally body terminal for all pfets should be tied to vdd and body of all nfets should be tied to GND. I did the change however simulation still aborting.
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Hello 1. vdacp and vdacn are the sampled sin input in the start of the conversion. afterwards they indeed change with setting B9-B1. but it's just a simple test setup, so they don't convert yet to each other or to a meaningfull value. ( these two dac branches should become the input of my differential comparator). I also start with LSB instead of MSB ( which I should still switch around for the real SAR) 2.thanks! I was used to connect source to bulk to prevent the Vbs effect. But if I googled it right, it is easier for layout to connect all source/bulk to gound/vdd (no extra wells needed and thus more area efficient)
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@Faedra Webers yes, it is possible in theory to draw each single pfet in a separate nwell and each single nfet into a separate insulated pwell (this requires to use a nwell ring and a buried nwell to separate the i-pwell from the pwell all around). However the circuit area will be huge and lot of parasitic capacitance will be added to the source terminals.
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