<@U03B44EKP36> The structures are not preserved. R...
# ieee-sscs-dc-22
b
@Alfonso Cortés The structures are not preserved. Refer to Tim's previous post on QFN packaging:
a
Thanks
j
Hello @Boris Murmann, @Tim Edwards, what about the chance of designing our own pads in the user area? i think this was mentioned in a previous meeting by another group but I didn't get what the conclusion was. We would like to drive 300mA which means a lot of analog pads wasted, so we are evaluating the design of a single custom metal pad to bypass this, do you see any inconvenients in doing this?
t
@Jorge Marin: The caravan analog power pads are designed to take that much current.
j
Thanks for the reply @Tim Edwards We are planning to use 10 to 20 volts input voltage on our Buck dcdc converter, do they stand these levels?
t
@Jorge Marin: By default, these pads are not connected to anything but are straight-through connections from pad to internal signal pin. So yes, they should be proper for use with 10-20V if you are very careful about doing the high voltage design. Providing ESD for a 20V input will be your own problem to solve.
j
@Tim Edwards you mean the vdda pins? I see they have the same area as analog pins, which seems to be too small for the electromigration limits for 300mA (as in @Weston Braun's openPMIC project, who uses several analog pads to partially alleviate this). Or I'm understanding wrongly?
@Weston Braun here, above
w
Tim, are the power pads no longer routed on only M3? Also, 300mA is pretty close to the fusing current for a 1 mil bond wire, do we have actual values for that from the packaging house?
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t
@Jorge Marin: Not the vdda pins, the three pins on the top of the caravan chip (only available on caravan, not on caravel) that correspond to mprj_io[18], [19], and [20]. As Weston points out, it is still very high current, even for the bond wire, and you would need to double up pads to carry that current. With two pads for power, you will still probably be breaking electromigration rules, but you shouldn't melt anything, and assuming you're not planning to use the chip continuously for days, the short chip lifetime shouldn't be a concern. But if you do your own internal pad, you will still need multiple pads and multiple bond wires to carry that much current. @Weston Braun: There is one area in which the current is carried a short distance on metal3 only, for which the metal3 was made very wide in that area. I believe that I ended up rating it for around 150mA?
w
Its still only 50um of total width. Or at least thats what it is on the edge of the user project area?
Did you modify the pad frame so it runs on all metal layers until it needs to cross the I/O ring? I see you extended some metal layers past the edge of the user project area on my design
t
@Weston Braun: It's 50um at the edge of the user project area where it is a stack of metal3, metal4, and metal5. At the point where the current is carried through metal3 only, it is (in total) 143um wide.
w
Ah. Thats only the power pads though, right? Not the ground pins nor the other analog pads?
t
Well, they're not dedicated to any specific purpose, so two could be used for power, and one for ground, and try to route the remaining current into the multiple ground pins.
I'm not saying it's a great solution, but it should be possible to do.
j
@Alfonso Cortés @SebastianNG