Does anyone know if IP is available for a CAM (Content addressable memory) or TCAM (Ternary CAM). Thank you

CAM: https://github.com/mcjtag/tcam https://systemverilogdesign.com/2023/06/24/cam-content-addressable-memory/ TCAM: https://github.com/mcjtag/tcam untested verilog, do your own research

Thank you very much. I will look at the verilog and test it toughly