I started labeling every single node and making my schematics match my layouts to make lvs easier. Works well so far. Am I a genius or what is wrong with this approach?

@Luke Harold Miles I would say that that is a best practice. Even though spice does not consider case, I would suggest using the same case in the layout and schematic.

I do this, those nets are going to get named anyway It also allows you to OP Annotate those random nodes just in case

"OP Annotate"?

Annotating the operating points (red) in the schematic capture tool

Oh yes I know that as 'b' annotation haha

I do this all the time for any circuit with more than a handful of components. makes lvs problem solving so much easier