Are there any ADCs that have taped out and been characterized yet?

Christoph Weiser (MPW 6 and MPW 7) and Manuel Moser (from Harald Pretl's group) (CI2024 and at least one earlier run but I'd have to look up which one). I had an 8-bit DAC and ADC that have been thoroughly characterized, and there was a 10-bit ADC that was taped out but has not yet come back so it has not been characterized yet. All of those are in the Efabless IPM repository.

Here is one: https://github.com/ucb-art/bag3_sync_sar_adc, and the notes on how to reproduce it: https://bag3-sync-sar-adc.readthedocs.io/en/latest/. It was on the June 2023 run, and the measurements match the simulated SF corner. Still waiting for eFabless to confirm that we indeed received the chips from an SF wafer, and whether another one is available...

That was done in Cadence, so it's not usable.

Not usable? Clone a repo and give it a try.

Okay, I do see the note that says "This is optional if you do not want to use virtuoso". So the inputs are all python scripts, and the outputs are optionally OA files?

Correct, BAG produces GDS. It also produces OA files for those (probably 99.9%) of analog designers who may some use for them.

And I probably know everybody in that remaining 0.1%. . .

What are OA files? Something for cadence? ... does this put me in the 0.1%?

Yes, probably.

well I guess I should make it my job to flip that script so that in 5 years only 1% of the designers use OA files. We should be able to have a linux distribution that comes pre-installed with BAG and all the other tools to make chips.

If you give it a try, you may find out that the generator will produce some reasonably good ADC layouts, no other tools are needed. One can even try to simulate them by using open-source tools (we didn't), but ADC people usually care about the noise, and the open-source simulators are not great in that department; commercial ones have much better chance of producing a reliable result. We provide Open Access (OA) views for those who can use them to move the design to commercial tools. That is an interchange format that commercial tools use (and despite the 'Open' in its name, it is not really open...). There is a VC-funded company, BlueCheetah Analog, that is based on this approach. In the meantime, I will bug eFabless again to try to figure out the process corner they sent us. When we close the silicon-to-simulation gap, we can publish this and perhaps provide a bit more of documentation.

I assume Blue Cheetah focuses on supporting commercial tools? Or do they target open source tools...

Bag is certainly an open-source tool: BAG3++ Documentation: https://bag3-readthedocs.readthedocs.io/en/latest/index.html BAG3 Skywater 130nm Workspace: https://github.com/ucb-art/bag3_skywater130_workspace But I can't speak for Blue Cheetah - they are a commercial company