Yes, I did not add a helper function for a 3.3V deep nwell. Once you put 3.3V transistors in the region, then the whole nwell becomes high voltage and is covered with the HVI mask. Then any guard rings become 3.3V diffusion and the nwell overlap minimum of the diffusion increases.
Requirements are in the open source documentation. Other than spacing of nwells and deep nwells from each other, the main requirements are the nwell overlap of the deep nwell boundary: 0.4um on the inside, 1.03um on the outside.