Hello, I am new to openlane and physical design. I wanted to try to implement physical design flow on a netlist and it's corresponding sdc constraints using openlane. Could someone please suggest a website or a forum where I could find sample verilog files for designs so that I could use them and get some hands-on experience on the openlane tool. Thank you in advance.

https://github.com/The-OpenROAD-Project/OpenLane git repo https://openlane.readthedocs.io/ documentation

@Vijayan Krishnan I checked the designs directory and could find some designs in it but I could not find any sdc constraints. Do we have to create these constraints on our own and then feed it to the tool or there is a place that provides sample sdc as well

I see, so this seems to me like a generic format. I'm assuming this allows design specific sdc formation that we may edit as per the requirements. could you please correct me here ?

Yes, you can..