open-source-silicon.dev

Hello, I am facing a big problem. My goal is to run an LVS either with OpenLane or with PreCheck. My design involves mixed-signal components, both analog and digital.
To run the LVS with PreCheck, I need to fill out the lvs_config.json file located in lvs/user_project_wrapper/. Since my design is mixed-signal, I use a black box for the analog cells when designing the top cell in OpenLane.
What files are needed for the LVS PreCheck? .spice and .v files are required. How do I define a black box when launching the LVS?

Alternatively, is there an option to run only the LVS with OpenLane using the modified gds file? If so, how do I run only the LVS, and where do I place the GDS file?


Thanks for your help

<@U04BQ6DU77S> openlane only runs LVS on the current level. Any macro (or standard cells for that matter) are treated as black-boxes.

For your analog cells, you can create a spice netlist from an xschem schematic. Just include it with in the `LVS_SPICE_FILES` section of the `lvs_config.json` file.

What is the reason for treating the analog cells as black boxes.