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HI All, I have one question regarding the caravan wrapper for the analog design. Are *`vdda1, vdda2`* are internally connected (shorted) or are they separate nets? And how does vddio gets the required voltage? How is it internally connected? Can anyone please help me with these questions? Thank you.

In sky130, `vdda1`, `vdda2`, `vddio` etc. are separate power domains and are supplied from the pcb independently. The default caravel board supplies 3.3V to `vddio` and doesn't supply power to `vdda1` or `vdda2`, just breaks them out to some pins. In gf180 it's all different and several of the power pins are shorted together.

<@U06JDGN07LM> at the chip level, they are separate pins. See <https://caravel-harness.readthedocs.io/en/latest/pinout.html>

At the daughter board level, they also appear to be separated. See <https://github.com/efabless/caravel_board/blob/main/docs/Caravel_Board_Specs%20_clean.pdf>

Hi <@U02G1ME9XCL> <@U017X0NM2E7> Thank you so much for your reply. I don't see any internal user connection to pin vddio. It is not present in the empty caravan wrapper but it is present in final gds I got after tapeout. One more thing are vssa1 and vssa2 are not connected together as well?

`vddio` is not connected to the user project area, it is used by the caravel harness itself (e.g. in the io cells for level shifting the digital pins)

<@U02G1ME9XCL> Ok. Thank you so much for your answer. I am using vdda1 for a 5V supply instead of 3.3V and designing my own board. I am not using any digital pin connections. Will 5V supply mess up with vddio connections in any way which may affect my circuit?

If you supply 5V to each of `vdda`, `vdda1` and `vddio`, and use 5V tolerant devices, you should be fine.

<@U02G1ME9XCL> there is not vddio pin in empty caravan wrapper in between vssa2 and vccd2. There in no terminal. It just appears in final layout I got after tapeout job.

&gt; One more thing are vssa1 and vssa2 are not connected together as well?
The pad frame shows `vssio`, `vssd` and `vssa` connected to the same pin, but `vssa1`, `vssa2`, `vssd1`, `vssd2` are connected to separate individual pins.

<@U017X0NM2E7> Sorry but I do not understand what does that mean. I do not see any pin names vssio, vssd and vssa in the empty caravan wrapper. I just see vssa1, vssa2, vssd1, vssd2.

The pins `vdda`, `vssa`, `vccd`, `vssd`, `vddio`, `vssio` are used by the padframe itself. The pins `vdda1`, `vssa1`, `vdda2`, `vssa2`, `vccd1`, `vssd1`, `vccd2`, `vssd2` are passed to your project embedded within the padframe. All of these pins are available from the outside.

Ok. <@U02G1ME9XCL>. Thank you so much for answer. How are vdda1 and vdda2 not shorted if they are coming from same vdda? I am just confused about padframe. I will look into its design.

They don't come from `vdda`. Each of `vdda`, `vdda1` and `vdda2` is separate.