Aswani AR
04/16/2024, 3:43 PMMitch Bailey
04/16/2024, 3:48 PMcvc.power
file that defines the analog signals.
There’s a template here https://github.com/d-m-bailey/extra_be_checks/blob/main/tech/sky130A/cvc.power.user_analog_project_wrapper
You’ll probably need to split the buses if the usage differs.
Be warned: cvc is likely to flag false errors in analog circuits.
You mean cvc, the reliability check, right? If you mean cvc, the verilog check, that’s a different problem.