@Tim Edwards I am making a layout for the Phase Frequency Detector (to be used in a PLL) in magic. It's my first time on magic. for clearing the basics, I did a layout of an inverter. However the PFD consists of logic gates and I am apprehensive on what material to use for connecting them and how will I provide power and ground rails to these gates. can you help me out with some resources?

You should separate this circuit in two halves and exclude the 4 input nand gate that outputs the reset signal. From the first inverter to the last inverter of each half, you could just make a single row and connect the inputs and outputs with the lower metal available. The cross coupled nand gates could be in another row. Flip it vertically and join the grounds together. The other signals of each half could be routed with higher level metals. Try Manhattan style, by making some layers for vertical only or horizontal only. After you complete each half, you just need to add the 4 input nand gate. Try to keep you floor plan tight and symmetrical. It is very important for a phase frequency detector.

thanks for the insights. have you design a PFD earlier?

It's is my job. The one that pays, at least.

ok, can you suggest some youtube tutorials to follow. i got your plan but need some walkthroughs

For layout, there is this one.

@Luis Henrique Rodovalho when I texted "have you designed a pfd before" I was predicting that you have an experience before. btw thanks for the videos. I went across them, I learnt a how to switch between metal layers.

Local interconnect is very resistive, but if the cells are joined together, it is better than raising the connection to M1 and lowering again to LI. You will need the upper layers for other signals. You will route then in M1. For example, in the first row of the gates, there are two nands. It could be routed using M1 above all those cells.

You want to minimize delays inside the PFD, so in addition to hand-placement like Luis suggested, you should double up local interconnect and metal1 where you can, and use lots of contacts. If you place standard cells by hand, make sure that you are abutting them properly, with the power rails touching. Any extra space should be filled with decap cells, with some extra decap around the sides to help stabilize the power supply. You will need tap cells at < 14um spacing in each row to satisfy latchup rules, and to make sure that the wells and substrate are connected. Never leave any space between standard cells.

@Tim Edwards what do you mean by doubling up

Your cells aren't joined together. You can use metal 2 too. Don't route signal from first nor A to second nor Y on the upper side. You need to make a locali to m1 contact there, and the routing in M1 prevents it