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Hi can I have some help with CACE? here is my repo...
# chipalooza
o
Hi can I have some help with CACE? here is my repo: https://github.com/ordicker/sky130_od_ip__tempsensor I'm running: 
cace-gui cace/sky130_od_ip__tempsensor.txt
and getting: 
Checking for out-of-date schematic-captured netlists.
Process Process-1:
Traceback (most recent call last):
File "/home/dicker/anaconda3/lib/python3.11/multiprocessing/process.py", line 314, in _bootstrap
self.run()
File "/home/dicker/anaconda3/lib/python3.11/multiprocessing/process.py", line 108, in run
self._target(*self._args, **self._kwargs)
File "/home/dicker/anaconda3/lib/python3.11/site-packages/cace/cace_gui.py", line 888, in cace_process
charresult = cace_run(datasheet, name)
^^^^^^^^^^^^^^^^^^^^^^^^^
File "/home/dicker/anaconda3/lib/python3.11/site-packages/cace/cace_cli.py", line 411, in cace_run
fullnetlistpath = regenerate_netlists(datasheet)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/home/dicker/anaconda3/lib/python3.11/site-packages/cace/common/cace_regenerate.py", line 1279, in regenerate_netlists
result = regenerate_schematic_netlist(dsheet)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/home/dicker/anaconda3/lib/python3.11/site-packages/cace/common/cace_regenerate.py", line 973, in regenerate_schematic_netlist
need_schem_capture = check_schematic_out_of_date(
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/home/dicker/anaconda3/lib/python3.11/site-packages/cace/common/cace_regenerate.py", line 339, in check_schematic_out_of_date
if not os.path.isfile(spicepath):
^^^^^^^^^^^^^^^^^^^^^^^^^
File "<frozen genericpath>", line 30, in isfile
TypeError: stat: path should be string, bytes, os.PathLike or integer, not NoneType
t
The immediate error is that you (probably) picked up an early version of one of my repositories and copied your characterization file from that; I changed the netlist paths to just "netlist", with the subdirectory of that being determined automatically from the netlist source (e.g., "schematic"). Change:
Copy code
netlist_schem:  netlist/schem
netlist_lvs:    netlist/lvs
netlist_rcx:    netlist/rcx
to just:
Copy code
netist:    netlist
There is another error after that one, though. I'm still investigating.
@Or Dicker: If you do an update to CACE, I just fixed an issue that was preventing it from regenerating the testbenches with the schematic referenced from the project top level directory (which is the way I was doing it previously; I did not intend to break compatibility with that method. There is one additional problem, which is that your testbench schematic 
dccurrent_vdd.sch
needs to add the file extension 
.data
to the filename in the 
wrdata
command, to match what the characterization file is looking for (the 
format
line in 
simulate
). With the update to CACE and the 
.data
in the testbench schematic, I can successfully run the characterization simulation.
o
Thank you! Now I'm getting 
Subcircuit sky130_od_ip__tempsensor was not found!
Do I need to define 
DUT_path
?
t
No, I think the problem is that I just failed to update the version when I pushed the update to CACE, so it didn't get updated in PiPI. Can you please try updating CACE again?
o
BTW, I think we should have better convention for 
.lib {PDK_ROOT}/{PDK}/libs.tech/combined/sky130.lib.spice
you got 
*/combined/*
, I use 
/usr/local/share/*
, I think that the default is 
/usr/share/*
. I think all that should be resolved in 
xschemrc
t
You can replace 
{PDK_ROOT}
with 
${PDK_ROOT}
and then xschem should handle it (likewise, replace 
{PDK}
with 
${PDK}
.
o
Works! Ok, got it. I think it would be better that your examples should use that too ($PDK_ROOT, $PDK). Thanks again
This would not solve your 
*/combined/*
that you have in your example, right?
t
CACE also tries to determine PDK_ROOT for subsitution (if xschem doesn't substitute it first); CACE's order of priority is: (1) environment variable PDK_ROOT, (2) /usr/local/share/pdk (if it exists), (3) /usr/share/pdk (if it exists), (4) /foss/pdks (if it exists), (5) ~/.volare (if it exists). Probably the method should be changed so that it also looks for the PDK as a subdirectory, because any of those locations might exist but the PDK being searched for might be installed elsewhere.
I'm not sure what the problem is with 
combined
? The sky130 PDK (since about half a year ago) has the newer continuous models in the path 
libs.tech/combined/
. If you want to use the older, discrete-binned models, change that to 
libs.tech/ngspice/
.
o
Ok, I have older version (install using open_pdks) and I thought 
combined
is something local on your machine.
Thanks again
t
The older models should work fine unless you're using a mismatch or monte carlo corner, in which case all the FETs must have the same W and L as one of the bins, otherwise ngspice won't be able to find a matching bin and will fail simulation.
c
Speaking of (on my search for a working proof-of-concept example how to make cace work): How would you do • mismatch-vs-size • 1/f noise-vs-size simulations of minimum length-ish 1u/0.15u nmos and pmos differential pairs • in cace? • (huge bonus points) in xschem, without exposure to cace version hell?? And how do you make the 
combined
models not barf at you if you want to draw 80um long transistors? [Personal observations on the reliability of the shuttle]
Well … after 
python3 -m pip install --upgrade cace
~/EDA/efabless/chipalooza2024/sky130_od_ip__tempsensor$ cace-gui
just works! On another computer with a different setup!! THIS IS SPECTACULAR!!! Only one thing: I'd like to log anything and everything that the tools report, and the text in 
cace-gui
is not selectable. Is that available in some log file or do I need to take a screenshot to document this? The terminal output can be caught by copy-and-paste, which I did.
t
@Christoph Maier: There is 
Settings-->Log simulation output
. I have not tested that setting recently and I'm not sure how much of the terminal output it will capture. The switch to multithreading already split the output between the console and terminal, and I have not yet worked on figuring out how to get it all back into one place.
c
@Tim Edwards, it would be nice if the perennial story of chasing CACE updates would go away for long enough that I can focus on basic details that tend to be taken for granted, but really aren't. Specifically, how to characterize mismatch and 1/f noise of very basic differential pairs. 1u/0.15u is awfully small

unless you cheat▾

.
t
Mismatch is effectively impossible to characterize because the mismatch models claim to be the mismatch of devices that are already matched by best layout practices---But that's a rather vague claim. Nevertheless, the best way to characterize mismatch in spite of that is to run simulations with mismatch corners (that is, 
.lib $PDK_ROOT/sky130A/libs.tech/combined/sky130.lib.spice tt_mm
), keep the testbench simulation simple, measure it 100+ times and get a statistically meaningful spread of results, and then measure the circuit performance based on some standard cutoff like three sigma.
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