I am currently designing a strongARM comparator for a 5-bit flash ADC. Something I’m noticing is somehow the “reference” input into my comparator’s diff pair is bouncing/oscillating -> this is causing the comparator to fail when I am trying to get < 10mV of resolution. The waveform on the left illustrates the failure mode; I put a resistor in series with the VREF DC source. The one on the right is when I don’t put a resistor in series with VREF DC source and directly drive the VREF input w/ the DC source. I’m not sure if there’s some kind of kickback / Cgd somehow shorting? Should I putting a lot of cap on the VREF nodes?