Has anyone tested their chips with reram submitted to either open-mpw or chipignite runs? I did a quick & crude test on mine submitted on 2211Q, and on power-up (should be in a pristine state, no forming yet), I get a resistance in the low kilo ohms for the reram device. This is very low when compared to the documentation here mentioning 10MOhms. If anyone has any measurements (especially if it's the same run), would be nice to compare test setup, design layout, dimensions, etc ...

@Andrea Mifsud Do you have access to the tapeout gds or oasis data for your final chip? Unfortunately, there may have been an older version of the pdk that dropped the reram layer on gdsout. If you can verify that the gds data you submitted for

user_analog_project_wrapper

has the reram layer and the final oasis does not, then that may explain what you’re seeing.

@Mitch Bailey I can confirm that the reram layer r1c is present in the submitted version and taped out version (I managed to get a copy) - so this shouldn't be an issue, but thank you!