Harsh Khandeparkar
12/13/2023, 10:51 AMextract.bash
script attached below. The resulting SPICE netlist has no resistances and some capacitances are floating. I also tried with the extract do resistance
, ext2spice rthresh 0
,extract do capacitance
, and ext2spice cthresh 0
options but still no resistances were generated.
Magic version: 8.3.452
@Tim Edwards, could you please take a look? Any help would be greatly appreciated. Thanks!
cc: @mehdiTim Edwards
12/13/2023, 2:13 PMload <cellname>
flatten my_flat_cell
load my_flat_cell
select top cell
extract do local
extract all
ext2sim labels on
ext2sim
extresist tolerance 10
extresist
ext2spice lvs
ext2spice cthresh 0
ext2spice extresist on
ext2spice
(I posted this in an earlier message, Nov. 27).
You can add a few extra lines to delete the original cell after flattening and then rename the flattened cell back to the original cell name so that the extracted netlist has the original cell name and not "my_flat_cell".
The main point is that ext2spice rthresh
does not generate parasitic resistances. It generates "lumped resistances" which are useful for capturing simplified wire delays but which won't work in SPICE.Tim Edwards
12/13/2023, 2:14 PMmehdi
12/13/2023, 2:16 PMTim Edwards
12/13/2023, 2:18 PMmehdi
12/13/2023, 2:19 PMload <cellname>
flatten my_flat_cell
load my_flat_cell
extract do local
extract all
ext2sim labels on
ext2sim
extresist tolerance 10
extresist
ext2spice lvs
ext2spice cthresh 0
ext2spice extresist on
ext2spice
mehdi
12/13/2023, 2:20 PMTim Edwards
12/13/2023, 2:21 PMTim Edwards
12/13/2023, 2:24 PMrun_lvspex.sh
script is doing the flattening and renaming part correctly. It is not doing the R-C extraction part correctly. There is no ext2sim
or extresist
in the code, so you're not going to get any parasitic resistances.mehdi
12/13/2023, 2:30 PMTim Edwards
12/13/2023, 2:42 PMextract all
, there are multiple .ext
files with the extraction information---Subsequently you can make multiple calls to ext2spice
with different options enabled to get netlists appropriate for LVS, simulaton, or RCX. There is no need to re-extract; ext2spice
will be using the .ext
files only. (The "simulation" netlist appears to be parasitic capacitance extraction only; I'm assuming you're using this "correctly", meaning that it is a way to get a somewhat more realistic simulation without getting the simulator bogged down with a full R-C extracted netlist).Harsh Khandeparkar
12/13/2023, 3:19 PMHarsh Khandeparkar
12/13/2023, 3:20 PMThe correct script for doing full RCX extraction is kind of complicated and looks like the following:Thanks a lot, I'll check this out!
Harsh Khandeparkar
12/13/2023, 3:29 PM.sim
file has resistances but not the .spice
file. Is this expected behaviour?Harsh Khandeparkar
12/13/2023, 3:34 PMTim Edwards
12/13/2023, 4:13 PMselect top cell
after the load
line. However, you have other issues, the main one being that you have written GDS using a tool other than magic, and it does not make the library name equal to the top cell name, which is how magic identifies a top-level cell in the GDS. So either you need to assume that the top level cell name is equal to the root name of the file, or you need to pass another argument to the script with the name of the top-level cell. Assuming the former (filename is "opamp.gds" so the top level cell is expected to be "opamp"), then the attached modified script would be appropriate.Harsh Khandeparkar
12/13/2023, 4:14 PMopamp
.Harsh Khandeparkar
12/13/2023, 4:15 PMext2spice merge aggressive
have any impact on the correctness of the output?Tim Edwards
12/13/2023, 4:18 PMmerge aggressive
as that will change device dimensions. merge conservative
is probably all right to use, but it may still change device parameters like drain/source area/perimeter, since one value has to apply to all merged devices. Since SPICE is going to expand any merged devices into individual ones, then merge
has no impact on simulation and only serves to reduce the file size.